Nonvolatile memories have been widely used as storage media in various embedded systems, such as home electronic devices, communication devices and set-top boxes. Nonvolatile memories can provide not only the advantages of random access memories (RAMs), which can be freely erased and written to, but also the advantages of read only memories (ROMs), which can store data stored even when a power supply is not present.
In some nonvolatile memories, data bits are stored in memory cells which include a single field-effect transistor having a control gate, a floating gate, a source and a drain. A data bit may be stored in the memory cell by varying the amount of charge at the floating gate so that the threshold voltage of the memory cell can be varied. Data may be read from the memory cell by applying a selection voltage to the control gate of the memory cell via a wordline.
Some memory cells simply have the capacity to store one bit indicating one of two different states, that is, the memory cell stores a bit-value of 1 or a bit value of 0 according to the voltage applied thereto to indicate a state in which data has been erased or a state in which data has been written. A technique for significantly reducing the cost per bit of nonvolatile memories is disclosed in “A Multilevel-Cell 32 Mb Flash Memory,” IEEE, ISSCC Digest of Technical Papers, pp. 132-133, M. Bauer et al., February 1995. This technique is characterized by providing the capacity to store two bits in each memory cell to indicate one of four different states.
Nonvolatile memories having the capacity to store two bits in each memory cell to indicate one of four different states are often referred to as multi-level cell (MLC) nonvolatile memories. Some MLC nonvolatile memories can store bit information regarding two pages in a memory cell, where the two pages are respectively referred to as a least significant bit (LSB) page and a most significant bit (MSB) page. Bit information is stored in the LSB page and then in the MSB page. For example, a 2-level MLC flash memory may represent four states, i.e., 00, 01, 10, and 11, using two bits.
An MLC nonvolatile memory may include a plurality of bit strings, each having a plurality of memory cells connected in series. A wordline may be connected to a plurality of memory cells that belong to different bit strings and that have the same offset.
In such an MLC nonvolatile memory, a pair of bit strings may share one bit buffer. In this case, bit information may be stored in an LSB page of a memory cell of one of the pair of bit strings, and then stored in an LSB page of a memory cell of the other bit string. Thereafter, the bit information may be alternately stored in the MSB pages of the memory cells of the pair of bit strings.
If power is cut off or a system error occurs while storing bit information in an MSB page of an MLC nonvolatile memory, the bit information stored in the MSB page may be corrupted, which may also corrupt bit information stored in an LSB page. In order to prevent corruption of the bit information stored in the LSB page, the bit information of the LSB page may be backed up or skipped.
More specifically, referring to FIG. 1, in order to avoid corruption of page E, which is an LSB page, during the storage of page X, which is an MSB page, page E may be backed up. In some conventional memory device, however, two pages may actually need to be backed up, as illustrated in FIG. 2. Referring to FIG. 3, in order to prevent corruption of page E during the storage of page X, page E may be skipped. In some conventional devices, however, two pages may actually be skipped, as illustrated in FIG. 4.
An LSB page may be backed up or skipped in order to prevent the bit information stored in the LSB page from being corrupted by the bit information not correlated with the bit information stored in the LSB page. For example, referring to FIG. 1, even though pages A, B, C, D, and E correlate with each other and page X does not correlate with any one of pages A, B, C, D, and E, the bit information stored in page E may be corrupted while storing bit information in page X. However, if two pages may be skipped or backed up at a time, this may cause a waste of storage capacity and may decrease the efficiency of the use of storage capacity.
Korean Patent Laid-Open Gazette No. 2005-007631 describes an MLC flash memory and a method of reading data from the MLC flash memory, in which data is read from an LSB page twice and then data is read from an MSB page once. However, this technique may not overcome decreased efficiency in the use of storage capacity in nonvolatile memories.